Crash Diagnostics

Dump CPU registers on panic. Why it matters: The previous panic handler printed only the file, line, and message; without register state, the developer cannot determine what value was in RSP or any GPR at the point of failure. Focus on `capture_registers` and `_panic_print` in `kernel/src/panic_diag.rs` while you trace the snippet.

/// Read all general-purpose registers, RFLAGS, CR2, and CR3.
///
/// Note: RIP cannot be directly captured from inline assembly — the values
/// here reflect the state at the point of capture inside this function, not
/// at the original panic site. The panic location printed by the caller
/// (file:line) is the best proxy for the faulting instruction.
fn capture_registers() -> RegisterSnapshot {
    let rax: u64;
    let rcx: u64;
    let rdx: u64;
    let rsi: u64;
    let rdi: u64;
    let rsp: u64;
    let r8: u64;
    let r9: u64;
    let r10: u64;
    let r11: u64;
    let r12: u64;
    let r13: u64;
    let r14: u64;
    let r15: u64;
    let rflags: u64;

    // Capture all GPRs in a single asm block.  rbx/rbp are LLVM-reserved and

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Enrich page fault handler (userspace). Why it matters: The userspace page fault handler prints PID, address, error code, and RIP, but not RSP, task state, scheduler state, or per-core context — exactly the information needed to diagnose the RIP=0x4 crash. Focus on `page_fault_handler` and `RIP=0x4` in `kernel/src/arch/x86_64/interrupts.rs` while you trace the snippet.

extern "x86-interrupt" fn page_fault_handler(
    mut stack_frame: InterruptStackFrame,
    err: PageFaultErrorCode,
) {
    let addr = x86_64::registers::control::Cr2::read();

    // Check if the fault came from ring 3 (user mode).
    if stack_frame.code_segment.rpl() == x86_64::PrivilegeLevel::Ring3 {
        // P17-T031: detect CoW faults — a write to a present, non-writable
        // page marked with BIT_9 (the CoW marker set by cow_clone_user_pages).
        let is_write = err.contains(PageFaultErrorCode::CAUSED_BY_WRITE);
        let is_present = err.contains(PageFaultErrorCode::PROTECTION_VIOLATION);
        if is_write
            && is_present
            && let Ok(fault_vaddr) = addr
        {
            let fault_addr_u64 = fault_vaddr.as_u64();
            if has_cow_marker(fault_addr_u64) {
                // CoW fault — resolve directly in the ISR. Safe because
                // the fault is from ring 3 (no kernel locks held) and
                // we're on a single CPU. On OOM, fall through to kill.
                if resolve_cow_fault(fault_addr_u64) {
                    return;
                }

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Assertions in `pick_next`. Why it matters: pick_next selects and returns a task's saved_rsp for dispatch; a stale or zero saved_rsp causes the exact RIP=0x4 crash pattern observed in production. Focus on `pick_next` and `saved_rsp` in `kernel/src/task/scheduler.rs` while you trace the snippet.

    /// Pick the next task to run on the given core.
    ///
    /// First checks the per-core run queue for an O(1) dequeue. Falls back
    /// to a global round-robin scan if the local queue is empty (handles
    /// tasks that haven't been assigned to a queue yet). Finally, falls back
    /// to this core's idle task.
    fn pick_next(&mut self, core_id: u8) -> Option<(u64, usize)> {
        let core_bit = 1u64 << core_id;

        // Scan local run queue: find the highest-priority (lowest numeric) Ready
        // task in a single pass, then remove only that entry. No heap allocation.
        if let Some(data) = crate::smp::get_core_data(core_id) {
            let mut q = data.run_queue.lock();
            let mut best_pos: Option<usize> = None;
            let mut best_prio: u8 = u8::MAX;

            // First pass: discard stale entries from the front while scanning.
            let mut i = 0;
            while i < q.len() {
                let idx = q[i];
                if idx >= self.tasks.len()
                    || self.tasks[idx].state != TaskState::Ready
                    || self.idle_tasks.contains(&Some(idx))
                    || self.tasks[idx].affinity_mask & core_bit == 0

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